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? 2002 microchip technology inc. ds21669b-page 1 m mcp6041/2/3/4 features ? low quiescent current: 600 na/amplifier (typ) ? rail-to-rail input: -0.3 v to v dd +0.3 v (max) ? rail-to-rail output: v ss +10 mv to v dd -10 mv (max) ? gain bandwidth product: 14 khz (typ) ? wide supply voltage range: 1.4 v to 5.5 v (max) ? unity gain stable ? available in single, dual and quad ? chip select (cs ) with mcp6043 ? 5-lead sot-23 package (mcp6041 only) applications ? toll booth tags ? wearable products ? temperature measurement ? battery powered available tools ? spice macro models (at www.microchip.com ) ? filterlab ? software (at www.microchip.com ) package types description the mcp6041/2/3/4 family of operational amplifiers from microchip technology, inc. operate with a single supply voltage as low as 1.4 v, while drawing less than 1 a (max) of quiescent current per amplifier. these devices are also designed to support rail-to-rail input and output operation. this combination of features sup- ports battery-powered and portable applications. the mcp6041/2/3/4 amplifiers have a typical gain bandwidth product of 14 khz (typ) and are unity gain stable. these specs make these operational amplifiers appropriate for low frequency applications, such as battery current monitoring and sensor conditioning. the mcp6041/2/3/4 family operational amplifiers are offered in single (mcp6041), single with a chip select (cs ) feature (mcp6043), dual (mcp6042) and quad (mcp6044) configurations. the mcp6041 device is available in the 5-lead sot-23 package. typical application +in -in v ss v dd out 1 2 3 4 8 7 6 5 - + nc nc nc +ina -ina v ss 1 2 3 4 8 7 6 5 - outa + - + a b v dd outb -inb +inb +in -in v ss v dd out 1 2 3 4 8 7 6 5 - + nc cs nc +ina1 -ina1 v ss 1 2 3 4 14 13 12 11 - outa + - + a d v dd outd -ind +ind 10 9 8 5 6 7 outb1 -inb +inb +inc -inc outc + - b c - + mcp6041 pdip, soic, msop mcp6042 pdip, soic, msop mcp6043 pdip, soic, msop mcp6044 pdip, soic, tssop mcp6041 sot-23-5 v dd +in 1 2 3 5 -in v ss out 4 - + v dd 10 ? mcp604x 100 k ? 1m ? v dd i dd +2.5 v to 5.5 v v ss high side battery curre nt sensor 600 na, rail-to-rail input/output op amps
mcp6041/2/3/4 ds21669b-page 2 2002 microchip technology inc. 1.0 electrical characteristics 1.1 maximum ratings* v dd - v ss ......................................................................................7.0 v all inputs and outputs................................... v ss ?0.3 v to v dd +0.3 v difference input voltage ..................................................... |v dd - v ss | output short circuit current ...............................................continuous current at input pins .................................................................. 2 ma current at output and supply pins ..........................................30 ma storage temperature ...................................................-65c to +150c ambient temp. with power applied ..............................-55c to +125c esd protection on all pins (hbm) ..................................................... 4kv *notice: stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended peri- ods may affect device reliability. pin function table mcp6041/2/3/4 dc electrical specifications name function +in/+ina/+inb/+inc/+ind non-inverting inputs -in/-ina/-inb/-inc/-ind inverting inputs v dd positive power supply v ss negative power supply out/outa/outb/outc/outd outputs cs chip select nc no internal connection to ic electrical characteristics: unless otherwise indicated, all limits are specified for v dd = +1.4 v to +5.5 v, v ss = gnd, t a = 25 c, v cm = v dd /2, r l = 1 m to v dd /2, and v out ~ v dd /2 parameters sym min typ max units conditions input offset: v cm = v ss input offset voltage v os -3.0 ? +3.0 mv drift with temperature v os / t? 1.5 ? v/ct a = -40c to+85c power supply rejection psrr 70 85 ? db input bias current and impedance: input bias current i b ?1.0? pa input bias current over temperature i b ??100pat a = -40c to+85 input offset current i os ?1.0? pa common mode input impedance z cm ?10 13 ||6 ? ||pf differential input impedance z diff ?10 13 ||6 ? ||pf common mode: common-mode input range vcmr v ss ? 0.3 ? v dd +0.3 v common-mode rejection ratio cmrr 62 80 ? db v dd = 5 v, v cm = -0.3 v to 5.3 v 60 75 ? db v dd = 5 v, v cm = 2.5 v to 5.3 v 60 80 ? db v dd = 5 v, v cm = -0.3 v to 2.5 v open loop gain: dc open loop gain (large signal) a ol 95 115 ? db r l = 50 k to v dd /2, 100 mv < v out < (v dd ? 100 mv) output: maximum output voltage swing v ol , v oh v ss + 10 ? v dd ? 10 mv r l = 50 k to v dd /2 linear region output voltage swing v ovr v ss + 100 ? v dd ? 100 mv r l = 50 k to v dd /2, a ol 95 db output short circuit current i o ?21? mav out = 2.5 v, v dd = 5 v power supply: supply voltage v dd 1.4 ? 5.5 v quiescent current per amplifier i q 0.3 0.6 1.0 a i o = 0
2002 microchip technology inc. ds21669b-page 3 mcp6041/2/3/4 mcp6041/2/3/4 ac electrical specifications specifications for mcp6043 chip select feature mcp6041/2/3/4 temperature specifications electrical characteristics: unless otherwise indicated, all limits are specified for v dd = +5 v, v ss = gnd, t a = 25 c, v cm = v dd /2, r l = 1 m to v dd /2, c l = 60 pf, and v out ~ v dd /2 parameters sym min typ max units conditions gain bandwidth product gbwp ? 14 ? khz slew rate sr ? 3.0 ? v/ms phase margin pm ? 65 ? g = +1 input voltage noise e n ? 5.0 ? vp-p f = 0.1 hz to 10 hz input voltage noise density e n ?170?nv/ hz f = 1 khz input current noise density i n ?0.6?fa/ hz f = 1 khz electrical characteristics: unless otherwise indicated, all limits are specified for v dd = +1.4 v to +5.5 v, v ss = gnd, t a = 25 c, v cm = v dd /2, r l = 1 m to v dd /2, c l = 60 pf, and v out ~ v dd /2 parameters sym min typ max units conditions cs low specifications: cs logic threshold, low v il v ss ?v ss + 0.3 v for entire v dd range cs input current, low i csl ?5.0?pacs = v ss cs high specifications: cs logic threshold, high v ih v dd - 0.3 ? v dd v for entire v dd range cs input current, high i csh ?5.0?pacs = v dd cs input high, gnd current i q ?20?pacs = v dd amplifier output leakage, cs high ? 20 ? pa cs = v dd dynamic specifications: cs low to amplifier output high turn-on time t on ?2.050mscs low = v ss + 0.3 v, g = +1 v/v, v out = 0.9 v dd /2 cs high to amplifier output high z t off ?10?scs high = v dd - 0.3 v, g = +1 v/v v out = 0.1 v dd /2 hysteresis v hyst ?0.6? vv dd = 5 v electrical characteristics: unless otherwise indicated, all limits are specified for v dd = +1.4 v to +5.5 v, v ss = gnd parameters symbol min typ max units conditions temperature ranges: specified temperature range t a -40 ? +85 c operating temperature range t a -40 ? +125 c note 1 storage temperature range t a -65 ? +150 c thermal package resistances: thermal resistance, 5l-sot23 ja ? 256 ? c/w thermal resistance, 8l-pdip ja ? 85 ? c/w thermal resistance, 8l-soic ja ? 163 ? c/w thermal resistance, 8l-msop ja ? 206 ? c/w thermal resistance, 14l-pdip ja ? 70 ? c/w thermal resistance, 14l-soic ja ? 120 ? c/w thermal resistance, 14l-tssop ja ? 100 ? c/w note 1: the mcp6041/2/3/4 family of op amps operates over this extended range, but with reduced performance.
mcp6041/2/3/4 ds21669b-page 4 2002 microchip technology inc. 2.0 typical performance curves note: unless otherwise indicated, v dd = +5 v, v ss = gnd, t a = 25c, v cm = v dd /2, r l = 1 m to v dd /2, c l = 60 pf , and v out ~v dd /2. figure 2-1: histogram of input offset voltage with v dd = 5.5 v, v cm = v dd . figure 2-2: histogram of input offset voltage with v dd = 5.5 v, v cm = v dd /2. figure 2-3: histogram of input offset voltage with v dd = 5.5 v, v cm = v ss . figure 2-4: histogram of input offset voltage with v dd = 1.4 v, v cm = v dd . figure 2-5: histogram of input offset voltage with v dd = 1.4 v, v cm = v dd /2. figure 2-6: histogram of input offset voltage with v dd = 1.4 v, v cm = v ss . note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 0% 5% 10% 15% 20% 25% 30% 35% -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 input offset voltage (mv) percentage 1196 samples v dd = 5.5v v cm = v dd 0% 5% 10% 15% 20% 25% 30% 35% -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 input offset voltage (mv) percentage 1199 samples v dd = 5.5v v cm = v dd /2 0% 5% 10% 15% 20% 25% 30% 35% -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 input offset voltage (mv) percentage 1199 samples v dd = 5.5v v cm = v ss 0% 5% 10% 15% 20% 25% 30% 35% -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 input offset voltage (mv) percentage 1196 samples v dd = 1.4v v cm = v dd 0% 5% 10% 15% 20% 25% 30% 35% -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 input offset voltage (mv) percentage 1199 samples v dd = 1.4v v cm = v dd /2 0% 5% 10% 15% 20% 25% 30% 35% -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 input offset voltage (mv) percentage 1199 samples v dd = 1.4v v cm = v ss
2002 microchip technology inc. ds21669b-page 5 mcp6041/2/3/4 note: unless otherwise indicated, v dd = +5 v, v ss = gnd, t a = 25c, v cm = v dd /2, r l = 1 m to v dd /2, c l = 60 pf , and v out ~v dd /2. figure 2-7: histogram of input offset voltage drift with v dd = 5.5 v, v cm = v dd /2. figure 2-8: histogram of input offset voltage drift with v dd = 5.5 v, v cm = v ss . figure 2-9: histogram of input offset voltage drift with v dd = 1.4 v, v cm = v ss . figure 2-10: input offset voltage vs. common mode input voltage vs. temperature with v dd = 5.5 v. figure 2-11: input offset voltage vs. common mode input voltage vs. temperature with v dd = 1.4 v. figure 2-12: input offset voltage vs. output voltage vs. power supply voltage. 0% 5% 10% 15% 20% 25% 30% 35% -10 -8 -6 -4 -2 0 2 4 6 8 10 input offset voltage drift (v/c) percentage 1176 samples v dd = 5.5v v cm = v dd /2 0% 5% 10% 15% 20% 25% 30% 35% -10 -8 -6 -4 -2 0 2 4 6 8 10 input offset voltage drift (v/c) percentage 1143 samples v dd = 5.5v v cm = v ss 0% 5% 10% 15% 20% 25% 30% 35% -10 -8 -6 -4 -2 0 2 4 6 8 10 input offset voltage drift (v/c) percentage 1124 samples v dd = 1.4v v cm = v ss -400 -300 -200 -100 0 100 200 300 400 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 common mode input voltage (v) input offset voltage (v) t a = -40c v dd = 5.5v t a = +25c t a = +85c t a = -40c t a = +25c t a = +85c -1000 -800 -600 -400 -200 0 200 400 600 800 1000 -0.5 0.0 0.5 1.0 1.5 2.0 common mode input voltage (v) input offset voltage (v) t a = +85c v dd = 1.4v t a = -40c t a = +25c t a = +85c t a = +85c 250 300 350 400 450 500 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 output voltage (v) input offset voltage (v) r l = 50 k v dd = 5.5v v dd = 1.4v
mcp6041/2/3/4 ds21669b-page 6 2002 microchip technology inc. note: unless otherwise indicated, v dd = +5 v, v ss = gnd, t a = 25c, v cm = v dd /2, r l = 1 m to v dd /2, c l = 60 pf , and v out ~v dd /2. figure 2-13: input noise voltage density vs. frequency. figure 2-14: common mode rejection ratio, power supply rejection ratio vs. frequency. figure 2-15: input bias, offset currents vs. common mode input voltage with temperature = 85c. figure 2-16: input noise voltage density vs. common mode input voltage. figure 2-17: common mode rejection ratio, power supply rejection ratio vs. temperature. figure 2-18: input bias, offset currents vs. temperature. 100 1000 0.1 1 10 100 1000 frequency (hz) e ni = 170 nv/ ? hz, f = 1 khz e ni = 5.0 vp-p, f = 0.1 to 10 hz input noise voltage density (nv/ ? hz) 20 30 40 50 60 70 80 90 0.1 1 10 100 1000 frequency (hz) cmrr, psrr (db) v dd = 5.0v cmrr psrr+ psrr- 0 10 20 30 40 50 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 common mode input voltage (v) input bias and offset current (pa) input bias current input offset current t a = 85c v dd = 5.5v 0 50 100 150 200 250 300 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 common mode input voltage (v) f = 1 khz v dd = 5v input noise voltage density (nv/ ? hz) 70 75 80 85 90 95 100 -40 -20 0 20 40 60 80 temperature (c) psrr, cmrr (db) psrr cmrr 1182 samples v dd = 5.0v v cm = v ss 0 5 10 15 20 25 30 35 40 45 -40-200 20406080 temperature ( c) input bias and offset current (pa) input offset current input bias current v dd = 5.5v v cm = v dd
2002 microchip technology inc. ds21669b-page 7 mcp6041/2/3/4 note: unless otherwise indicated, v dd = +5 v, v ss = gnd, t a = 25c, v cm = v dd /2, r l = 1 m to v dd /2, c l = 60 pf , and v out ~v dd /2. figure 2-19: quiescent current vs. temperature vs. power supply voltage. figure 2-20: open loop gain, phase vs. frequency with v dd = 5.5 v. figure 2-21: open loop gain vs. power supply voltage. figure 2-22: quiescent current vs. power supply voltage vs. temperature. figure 2-23: open loop gain vs. load resistance vs. power supply voltage. figure 2-24: open loop gain vs. output voltage headroom vs. power supply voltage. 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 -40 -20 0 20 40 60 80 temperature ( c) quiescent current (a/amplifier) v dd = 1.4v v dd = 5.5v -20 0 20 40 60 80 100 120 140 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 1.e+04 1.e+05 frequency (hz) open loop gain (db) -240 -210 -180 -150 -120 -90 -60 -30 0 open loop phase () v dd = 5.5v 0.001 0.01 0.1 1 10 100 1k 10k 100k open loop gain open loop phase 80 90 100 110 120 130 140 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 power supply voltage, v dd (v) dc open loop gain (db) r l = 50 k v ss + 100 mv < v out < v dd - 100 mv 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 power supply voltage, v dd (v) quiescent current (a/amplifier) t a = -40c t a = +25c t a = +85c 60 70 80 90 100 110 120 130 1. e +0 2 1. e +0 3 1. e +0 4 1. e +0 5 load resistance ( ) dc open loop gain (db) v dd = 1.4v v out = 0.5v to 0.9v v dd = 5.5v v out = 0.5v to 5.0v 100 1k 10k 100k 80 90 100 110 120 130 140 0.00 0.05 0.10 0.15 0.20 0.25 output voltage headroom, v dd -v out or v out -v ss (v) open loop gain (db) r l = 50 k v dd = 5.5v v dd = 1.4v
mcp6041/2/3/4 ds21669b-page 8 2002 microchip technology inc. note: unless otherwise indicated, v dd = +5 v, v ss = gnd, t a = 25c, v cm = v dd /2, r l = 1 m to v dd /2, c l = 60 pf , and v out ~v dd /2. figure 2-25: channel to channel separation vs. frequency (mcp6042 and mcp6044 only). figure 2-26: gain bandwidth product, phase margin vs. temperature with v dd = 5.5 v, unity gain. figure 2-27: unity loop gain frequency, phase margin vs. load capacitance. figure 2-28: gain bandwidth product, phase margin vs. common mode input voltage with unity gain. figure 2-29: gain bandwidth product, phase margin vs. temperature with v dd = 1.4 v, unity gain. figure 2-30: output short circuit current vs. temperature vs. power supply voltage. 60 70 80 90 100 110 120 130 1.e+02 1.e+03 1.e+04 frequency (hz) 100 1k 10k input referred channel to channel separation (db) 0 2 4 6 8 10 12 14 16 18 -40-20 0 20406080 temperature (c) 0 10 20 30 40 50 60 70 80 90 phase margin () phase margin gain bandwidth product v dd = 5.5v g = +1 v/v gain bandwidth product (khz) 0 2 4 6 8 10 12 14 16 18 10 100 1000 load capacitance (pf) 0 10 20 30 40 50 60 70 80 90 phase margin () unity loop gain frequency phase margin v dd = 5.5v g = +1 v/v r l = 10 k unity loop gain frequency (khz) 0 2 4 6 8 10 12 14 16 18 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 common mode input voltage(v) 0 10 20 30 40 50 60 70 80 90 phase margin () phase margin gain bandwidth product v dd = 5v r l = 100 k g = +1 v/v gain bandwidth product (khz) 0 2 4 6 8 10 12 14 16 18 -40 -20 0 20 40 60 80 temperature (c) 0 10 20 30 40 50 60 70 80 90 phase margin () phase margin gain bandwidth product v dd = 1.4v g = +1 v/v gain bandwidth product (khz) 0 5 10 15 20 25 30 35 40 -40-200 20406080 temperature (c) output short circuit current (ma) | i sc- | @ v dd =5.5v i sc+ @ v dd =5.5v | i sc- | @ v dd =1.4v i sc+ @ v dd =1.4v
2002 microchip technology inc. ds21669b-page 9 mcp6041/2/3/4 note: unless otherwise indicated, v dd = +5 v, v ss = gnd, t a = 25c, v cm = v dd /2, r l = 1 m to v dd /2, c l = 60 pf , and v out ~v dd /2. figure 2-31: slew rate vs. temperature. figure 2-32: output voltage headroom vs. load resistance vs. power supply voltage. figure 2-33: small signal non-inverting pulse response. figure 2-34: output voltage swing vs. frequency vs. power supply voltage. figure 2-35: output voltage headroom vs. temperature. figure 2-36: small signal inverting pulse response. 0 1 2 3 4 5 6 -40-200 20406080 temperature (c) slew rate (v/ms) high-to-low transition low-to-high transition v dd = 5.0v 1 10 100 1.e+03 1.e+04 1.e+05 load resistance ( : ) output voltage headroom, v dd -v oh or v ol -v ss (mv) v ol -v ss @ v dd = 5.5v 1k 10k 100k v ol -v ss @ v dd = 1.4v v dd -v oh @ v dd = 5.5v v dd -v oh @ v dd = 1.4v -3.e-02 -2.e-02 -2.e-02 -1.e-02 -5.e-03 0.e+00 5.e-03 1.e-02 2.e-02 2.e-02 3.e-02 0.e+00 1.e-04 2.e-04 3.e-04 4.e-04 5.e-04 6.e-04 7.e-04 8.e-04 9.e-04 1.e-03 time (100 s/div) output voltage (5mv/div) v dd = 5.0v g = +1 v/v r l = 50 k 0.1 1 10 1.e+01 1.e+02 1.e+03 1.e+04 frequency (hz) output voltage swing (vp-p) 10 100 1k 10k v dd = 5.5v v dd = 1.4v 0 1 2 3 4 5 -40-20 0 20406080 temperature (c) output voltage headroom, v dd - v oh or v ol - v ss (mv) v ol - v ss v dd - v oh v dd = 5.5v r l = 50 k -0.025 -0.020 -0.015 -0.010 -0.005 0.000 0.005 0.010 0.015 0.020 0.025 0.0e+00 1.0e-04 2.0e-04 3.0e-04 4.0e-04 5.0e-04 6.0e-04 7.0e-04 8.0e-04 9.0e-04 1.0e-03 time (100 s/div) voltage (5 mv/div) v dd = 5.0v g = -1 v/v r l = 50 k
mcp6041/2/3/4 ds21669b-page 10 2002 microchip technology inc. note: unless otherwise indicated, v dd = +5 v, v ss = gnd, t a = 25c, v cm = v dd /2, r l = 1 m to v dd /2, c l = 60 pf , and v out ~v dd /2. figure 2-37: large signal non-inverting pulse response. figure 2-38: chip select (cs ) to amplifier output response time (mcp6043 only). figure 2-39: the mcp6041/2/3/4 family shows no phase reversal (for information only? the maximum absolute input voltage is still v ss -0.3 v and v dd +0.3 v). figure 2-40: large signal inverting pulse response. figure 2-41: chip select (cs ) hysteresis (mcp6043 only). 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.e+00 1.e-03 2.e-03 3.e-03 4.e-03 5.e-03 6.e-03 7.e-03 8.e-03 9.e-03 1.e-02 time (1 ms/div) output voltage (v) v dd = 5.0v g = +1 v/v r l = 50 k -20.0 -17.5 -15.0 -12.5 -10.0 -7.5 -5.0 -2.5 0.0 2.5 5.0 7.5 0.e+00 1.e-03 2.e-03 3.e-03 4.e-03 5.e-03 6.e-03 7.e-03 8.e-03 9.e-03 1.e-02 time (1 ms/div) -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 output voltage (v) v dd = 5.0v chip select (cs) voltage (v) v out cs output hi-z output hi-z output driven -1 0 1 2 3 4 5 6 0.00e+00 5.00e-03 1.00e-02 1.50e-02 2.00e-02 2.50e-02 time (5 ms/div) output voltage (v) v in v dd = 5.0v g = +2 v/v v out 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.e+00 1.e-03 2.e-03 3.e-03 4.e-03 5.e-03 6.e-03 7.e-03 8.e-03 9.e-03 1.e-02 time (1 ms/div) output voltage (v) v dd = 5.0v g = -1 v/v r l = 50 k -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 1 2 3 4 5 cs input voltage (v) amplifier output?active (driven) amplifier output?hi-z v dd = 5.0v cs input high to low cs input low to high hysteresi s internal cs switch output (v)
2002 microchip technology inc. ds21669b-page 11 mcp6041/2/3/4 3.0 applications information the mcp6041/2/3/4 family of operational amplifiers are fabricated on microchip?s state-of-the-art cmos process. they are unity gain stable and suitable for a wide range of applications requiring very low power consumption. with these op amps, the power supply pin needs to be by-passed with a 0.1 f capacitor. 3.1 rail to rail input the input stage of the family of devices uses two differ- ential input stages in parallel; one operates at low v cm (common mode input voltage) and the other at high v cm . with this topology, the mcp6041/2/3/4 family operates with v cm up to 300 mv past either supply rail. the input offset voltage is measured at both v cm =v ss - 0.3 v and v dd + 0.3 v to ensure proper operation. 3.2 output loads and battery life the mcp6041/2/3/4 op amp family has outstanding quiescent current, which supports battery-powered applications. there is minimal quiescent current glitch- ing when chip select (cs ) is raised or lowered. this prevents excessive current draw and reduced battery life, when the part is turned off or on. heavy resistive loads at the output can cause exces- sive battery drain. driving a dc voltage of 2.5 v across a 100 k load resistor will cause the supply current to increase by 25 a, depleting the battery 43 times as fast as i q (0.6 a typ) alone. high frequency signals (fast edge rate) across capaci- tive loads will also significantly increase supply current. for instance, a 0.1 f capacitor at the output presents an ac impedance of 15.9 k (1/2 fc) to a 100 hz sinewave. it can be shown that the average power drawn from the battery by a 5.0 vp-p sinewave (1.77 vrms), under these conditions, is: equation this will drain the battery 18 times as fast as i q alone. 3.3 rail to rail output the output voltage range of the mcp6041/2/3/4 family is specified two ways. the first specification, maximum output voltage swing, defines the maximum swing possible under a particular output load. according to the spec table, the output can reach 10 mv of either supply rail when r l = 50 k . see figure 2-32 for infor- mation on maximum output voltage swing vs. load resistance. the second specification, linear region output volt- age swing, details the output voltage range that sup- ports the specified open loop gain (a ol 95 db with r l = 50 k ). 3.4 input voltage and phase reversal the mcp6041/2/3/4 op amp family uses cmos tran- sistors at the input. it is designed to not exhibit phase inversion when the input pins exceed the supply volt- ages. figure 2-39 shows an input voltage exceeding both supplies with no resulting phase inversion. the maximum operating v cm (common mode input voltage) that can be applied to the inputs is v ss -0.3 v and v dd +0.3 v. voltage on the input that exceed this absolute maximum rating can cause excessive current to flow in or out of the input pins. current beyond 2 ma can cause possible reliability problems. applications that exceed this rating must be externally limited with an input resistor as shown in figure 3-1. figure 3-1: an input resistor, r in , should be used to limit excessive input current if the inputs exceed the absolute maximum specification. 3.5 capacitive load and stability driving capacitive loads can cause stab ility problems with voltage feedback op amps. a buffer configuration (g = +1) is the most sensitive to capacitive loads. figure 2-27 shows how increasing the load capaci- tance will decrease the phase margin. while a phase margin above 60 is ideal, 45 is sufficient. as can be seen, up to c l = 150 pf can be placed on the mcp6041/2/3/4 op amp outputs without any problems, while 250 pf is usable with a 45 phase margin. when the op amp is required to drive large capacitive loads (c l >150 pf), a small series resistor (r iso in figure 3-2) at the output of the amplifier improves the phase margin. this resistor makes the output load resistive at higher frequencies, which improves the phase margin. the bandwidth reduction caused by the capacitive load, however, is not changed. to select r iso , start with 1 k , then use the mcp6041 spice p supply v dd v ss ? () i q v lp p ? () + fc l () = 3.0 w50 w + = 5v () 0.6 a5.0v pp ? + 100hz 0.1 f ? ? () = r in v ss minimum expected v in () ? 2 ma --------------------------------------------------------------------------- - r in maximum expected v in () v dd ? 2 ma ------------------------------------------------------------------------------ - v in r in v out mcp604x
mcp6041/2/3/4 ds21669b-page 12 2002 microchip technology inc. macro model and bench testing to adjust r iso until the frequency response peaking is reasonable. use the smallest reasonable value. figure 3-2: amplifier circuit for heavy capacitive loads. 3.6 the mcp6043 chip select (cs ) option the mcp6043 is a single amplifier with a chip select (cs ) option. when cs is pulled high, the supply current drops to 20 pa (typ) and goes through the cs pin to v ss . when this happens, the amplifier is put into a high impedance state. by pulling cs low, the amplifier is enabled. if the cs pin is left floating, the amplifier will not operate properly. figure 3-3 shows the output volt- age and supply current response to a cs pulse. figure 3-3: timing diagram for the cs function on the mcp6043 op amp. 3.7 layout considerations good pc board layout techniques will help you achieve the performance shown in the specs and typical per- formance curves. it will also assist in minimizing elec- tro-magnetic compatibility (emc) issues. 3.7.1 surface leakage in applications where low input bias current is critical, pc board surface leakage effects and signal coupling from trace to trace need to be considered. surface leakage is caused by a difference in voltage between traces, combined with high humidity, dust or other contamination on the board. under low humidity conditions, a typical resistance between nearby traces is 10 12 . a 5 v difference would cause 5 pa of current to flow; this is greater than the input current of the mcp6041/2/3/4 family at 25c (1 pa, typ). the simplest technique to reduce surface leakage is using a guard ring around sensitive pins (or traces). the guard ring is biased at the same voltage as the sensitive pin or trace. figure 3-4 shows an example of a typical layout. figure 3-4: example of guard ring layout. circuit schematics for different guard ring implementa- tions are shown in figure 3-5. figure 3-5a biases the guard ring to the input common mode voltage, which is most effective for non-inverting gains, including unity gain. figure 3-5b biases the guard ring to a reference voltage (v ref , which can be ground). this is useful for inverting gains and precision photo sensing circuits. figure 3-5: two possible guard ring connection strategies to reduce surface leakage effects. v in r iso v out mcp604x c l v il hi-z t on v ih cs t off v out i vdd 20 pa, typ hi-z i vss i cs 5 pa, typ 5pa, typ 20 pa, typ 0.6 a, typ 5 pa, typ 0.6 a, typ 5pa, typ guard ring v ss in- in+ v ref mcp604x figure 3-5a figure 3-5b v dd v ref mcp604x v dd
2002 microchip technology inc. ds21669b-page 13 mcp6041/2/3/4 3.7.2 component placement separate digital from analog and low speed from high speed. this helps prevent crosstalk. keep sensitive traces short and straight. separate them from interfering components and traces. this is especially important for high frequency (low rise time) signals. use a 0.1 f supply bypass capacitor within 0.1? (2.5 mm) of the v dd pin. it must connect directly to the ground plane. 3.7.3 signal coupling the input pins of the mcp6041/2/3/4 family of op amps are high impedance, which allows noise injection. this noise can be capacitively or magnetically coupled. in either case, using a ground plane helps reduce noise injection. when noise is coupled capacitively, the ground plane provides shunt capacitance to ground for high fre- quency signals. figure 3-6 shows the equivalent cir- cuit. the coupled current, i m , produces a lower voltage (v trace 2 ) on the victim trace when the trace to ground plane capacitance (c sh2 ) is large and the terminating resistor (r t2 ) is small. increasing the distance between traces, and using wider traces, also helps. figure 3-6: equivalent circuit for capacitive coupling between traces on a pc board (with ground plane). when noise is coupled magnetically, ground plane reduces the mutual inductance between traces. this occurs because the ground return current at high fre- quencies will follow a path directly beneath the signal trace. increasing the separation between traces makes a significant difference. changing the direction of one of the traces can also reduce magnetic coupling. if these techniques are not enough, it may help to place guard traces next to the victim trace. they should be on both sides of the victim trace and be as close as possi- ble. connect the guard traces to ground plane at both ends, and in the middle, for long traces. 3.8 typical applications 3.8.1 battery current sensing the mcp6041/2/3/4 op amps? common mode input range, which goes 300 mv beyond both supply rails, supports their use in high side and low side battery current sensing applications. the very low quiescent current (0.6 a, typ) help prolong battery life while the rail-to-rail output allows you to detect low currents. figure 3-7 shows a high side battery current sensor cir- cuit. the 10 resistors are sized to minimize power losses. the battery current (i dd ) through the 10 resistor causes its top terminal to be more negative than the bottom terminal. this keeps the common mode input voltage of the op amp v dd , which is within its allowed range. the output of the op amp can reach v dd - 0.1 mv (see figure 2-32), which is a smaller error than the offset voltage. figure 3-7: high side battery current sensor. 3.8.2 instrumentation amplifier the mcp6041/2/3/4 op amp is well suited for condition- ing sensor signals in battery-powered applications. figure 3-8 shows a two op amp instrumentation amplifier, using the mcp6042, that works well for appli- cations requiring rejection of common mode noise at higher gains. the reference voltage (v ref ) is supplied by a low impedance source. in single supply applications, v ref is typically v dd /2. figure 3-8: two op amp instrumentation amplifier. v trace 1 r t2 c m c sh2 c sh1 v trace 2 i m v dd 10 mcp604x 100 k 1m v dd i dd +2.5 v to 5.5 v v ss v ref ? mcp6042 r 1 r g v out r 1 r 1 r 1 v 2 v 1 ? mcp6042 v out v 1 v 2 ? () 1 r 1 r 2 ----- - 2r 1 r g --------- ++
v ref + =
mcp6041/2/3/4 ds21669b-page 14 2002 microchip technology inc. 4.0 spice macro model the spice macro model for the mcp6041, mcp6042, mcp6043 and mcp6044 simulates the typical ampli- fier performance of: offset voltage, dc power supply rejection, input capacitance, dc common mode rejec- tion, open loop gain over frequency, phase margin, out- put swing, dc power supply current, power supply current change with supply voltage, input common mode range, output voltage range vs. load and input voltage noise. the characteristics of the mcp6041, mcp6042, mcp6043 and mcp6044 amplifiers are similar in terms of performance and behavior. this single op amp macro model supports all four devices with the excep- tion of the chip select function of the mcp6043, which is not modeled. the listing for this macro model is shown on the next page. the most recent revision of the model can be downloaded from microchip?s web site at www.microchip.com .
2002 microchip technology inc. ds21669b-page 15 mcp6041/2/3/4 software license agreement the software supplied herewith by microchip technology incorporated (the ?company?) is intended and supplied to you, the com- pany?s customer, for use solely and exclusively on microchip products. the software is owned by the company and/or its supplier, and is protected under applicable copyright laws. all rights are rese rved. any use in violation of the foregoing restrictions may subject the user to criminal sanctions under applicable laws, as well as to civil liability for the breach of the terms and conditions of this license. this software is provided in an ?as is? condition. no warranties, whether express, implied or statu- tory, including, but not limited to, implied warranties of merchantability and fitness for a particu- lar purpose apply to this software. the company shall not, in any circumstances, be liable for special, incidental or consequential damages, for any reason whatsoever. .subckt mcp6041 1 2 3 4 5 * | | | | | * | | | | output * | | | negative supply * | | positive supply * | inverting input * non-inverting input * * macromodel for the mcp6041/2/3/4 op amp family: * mcp6041 (single) * mcp6042 (dual) * mcp6043 (single w/ cs; chip select is not modeled) * mcp6044 (quad) * * revision history: * rev a: 7-9-01 created keb * * recommendations: * use pspice (other simulators may require translation) * for a quick, effective design, use a com- bination of: data sheet * specs, bench testing, and simulations with this macromodel * for high impedance circuits, set gmin=100f in the.options * statement * * supported: * typical performance at room temperature (25 degrees c) * dc, ac, transient, and noise analyses. * most specs, including: offsets, psrr, cmrr, input impedance, * open loop gain, voltage ranges, supply current,..., etc. * * not supported: * chip select (mcp6043) * variation in specs vs. power supply volt- age * distortion (detailed non-linear behavior) * temperature analysis * process variation * behavior outside normal operating region * * input stage v10 3 10 -0.3 r10 10 11 78k r11 10 12 78k c11 11 12 4.9p c12 1 0 6p e12 1 14 poly(4) 20 0 21 0 26 0 27 0 1m 1 1 1 1 g12 14 0 poly(2) 22 0 23 0 1.5p 1u 1u m12 11 14 15 15 nmi c13 14 2 3p m14 12 2 15 15 nmi g14 2 0 poly(2) 24 0 25 0 0.5p 1u 1u c14 2 0 6p i15 15 4 500n v16 16 4 0.18 d16 16 15 dl v13 3 13 0.00 d13 14 13 dl * * noise sources i20 21 20 17.2n d20 20 0 dn1 d21 0 21 dn1 i22 23 22 588u d22 22 0 dn23 d23 0 23 dn23 i24 25 24 588u d24 24 0 dn23 d25 0 25 dn23 * * psrr and cmrr g26 0 26 poly(1) 3 4 110u -20u r26 26 0 1 g27 0 27 poly(2) 1 3 2 4 -275u 50u 50u r27 27 0 1 * * open loop gain, slew rate g30 0 30 poly(1) 12 11 0 1meg r30 30 0 1 c30 30 0 11.4 g31 0 31 poly(1) 30 0 0 1 r31 31 0 1 c31 31 0 775n * * output stage g40 0 40 poly(1) 45 5 0 22.7m d41 40 41 dl r41 41 0 1k d42 42 40 dl r42 42 0 1k g43 3 0 poly(1) 41 0 100n 1m g47 0 4 poly(1) 42 0 100n -1m e43 43 0 poly(1) 3 0 0 1
mcp6041/2/3/4 ds21669b-page 16 2002 microchip technology inc. e47 47 0 poly(1) 4 0 0 1 v44 43 44 1m d44 45 44 dls d46 46 45 dls v46 46 47 1m g45 47 45 poly(2) 31 0 3 4 0 8u 4u r45 45 47 125k r48 45 5 44 c48 5 0 2p * * models .model nmi nmos l=2 w=42 .model dl d n=1 is=1f .model dls d n=1m is=1f .model dn1 d is=1f kf=1.13e-18 af=1 .model dn23 d is=1f kf=3e-20 af=1 * .ends mcp6041
2002 microchip technology inc. ds21669b-page 17 mcp6041/2/3/4 5.0 packaging information 5.1 package marking information xxxxxxxx xxxxxnnn yyww 8-lead pdip (300 mil) example: 8-lead soic (150 mil) example: xxxxxxxx xxxxyyww nnn legend: xx...x customer specific information* yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * standard marking consists of microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). for marking beyond this, certain price adders apply. please check with your microchip sales office. mcp6041 i/pnnn yyww mcp6041 i/snyyww nnn 8-lead msop example: xxxxxx ywwnnn 6041 ywwnnn 1 23 5 4 5-lead sot-23 (mcp6041 only) example: xxnn 1 23 5 4 sbnn
mcp6041/2/3/4 ds21669b-page 18 2002 microchip technology inc. 5.1 package marking information (continued) 14-lead pdip (300 mil) (mcp6044) example: 14-lead tssop (mcp6044) example: 14-lead soic (150 mil) (mcp6044) example: xxxxxxxxxxxxxx xxxxxxxxxxxxxx yywwnnn xxxxxxxxxx yywwnnn xxxxxx yyww nnn legend: xx...x customer specific information* yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * standard marking consists of microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). for marking beyond this, certain price adders apply. please check with your microchip sales office. mcp6044 -i/p xxxxxxxxxxxxxx yywwnnn 6044 st yyww nnn xxxxxxxxxx mcp6044 isl yywwnnn xxxxxxxxxx
2002 microchip technology inc. ds21669b-page 19 mcp6041/2/3/4 8-lead plastic dual in-line (p) ? 300 mil (pdip) b1 b a1 a l a2 p e eb c e1 n d 1 2 units inches* millimeters dimension limits min nom max min nom max number of pins n 88 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .360 .373 .385 9.14 9.46 9.78 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top 51015 51015 mold draft angle bottom 51015 51015 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed jedec equivalent: ms-001 drawing no. c04-018 .010? (0.254mm) per side. significant characteristic
mcp6041/2/3/4 ds21669b-page 20 2002 microchip technology inc. 8-lead plastic small outline (sn) ? narrow, 150 mil (soic) foot angle 048048 15 12 0 15 12 0 mold draft angle bottom 15 12 0 15 12 0 mold draft angle top 0.51 0.42 0.33 .020 .017 .013 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 0.76 0.62 0.48 .030 .025 .019 l foot length 0.51 0.38 0.25 .020 .015 .010 h chamfer distance 5.00 4.90 4.80 .197 .193 .189 d overall length 3.99 3.91 3.71 .157 .154 .146 e1 molded package width 6.20 6.02 5.79 .244 .237 .228 e overall width 0.25 0.18 0.10 .010 .007 .004 a1 standoff 1.55 1.42 1.32 .061 .056 .052 a2 molded package thickness 1.75 1.55 1.35 .069 .061 .053 a overall height 1.27 .050 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d n p b e e1 h l c 45 a2 a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-012 drawing no. c04-057 significant characteristic
2002 microchip technology inc. ds21669b-page 21 mcp6041/2/3/4 8-lead plastic micro small outline package (ms) (msop) p a a1 a2 d l c dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not .037 .035 f footprint (reference) exceed .010" (0.254mm) per side. notes: drawing no. c04-111 *controlling parameter mold draft angle top mold draft angle bottom foot angle lead width lead thickness c b 7 7 .004 .010 0 .006 .012 (f) dimension limits overall height molded package thickness molded package width overall length foot length standoff overall width number of pins pitch a l e1 d a1 e a2 .016 .114 .114 .022 .118 .118 .002 .030 .193 .034 min p n units .026 nom 8 inches 1.00 0.95 0.90 .039 0.15 0.30 .008 .016 6 0.10 0.25 0 7 7 0.20 0.40 6 millimeters* 0.65 0.86 3.00 3.00 0.55 4.90 .044 .122 .028 .122 .038 .006 0.40 2.90 2.90 0.05 0.76 min max nom 1.18 0.70 3.10 3.10 0.15 0.97 max 8 e1 e b n 1 2 significant characteristic .184 .200 4.67 .5.08
mcp6041/2/3/4 ds21669b-page 22 2002 microchip technology inc. 5-lead plastic small outline transistor (ot) (sot23) 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.50 0.43 0.35 .020 .017 .014 b lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 10 5 0 10 5 0 foot angle 0.55 0.45 0.35 .022 .018 .014 l foot length 3.10 2.95 2.80 .122 .116 .110 d overall length 1.75 1.63 1.50 .069 .064 .059 e1 molded package width 3.00 2.80 2.60 .118 .110 .102 e overall width 0.15 0.08 0.00 .006 .003 .000 a1 standoff 1.30 1.10 0.90 .051 .043 .035 a2 molded package thickness 1.45 1.18 0.90 .057 .046 .035 a overall height 1.90 .075 p1 outside lead pitch (basic) 0.95 .038 p pitch 5 5 n number of pins max nom min max nom min dimension limits millimeters inches* units 1 p d b n e e1 l c a2 a a1 p1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: mo-178 drawing no. c04-091 significant characteristic
2002 microchip technology inc. ds21669b-page 23 mcp6041/2/3/4 14-lead plastic dual in-line (p) ? 300 mil (pdip) e1 n d 1 2 eb e c a a1 b b1 l a2 p units inches* millimeters dimension limits min nom max min nom max number of pins n 14 14 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .740 .750 .760 18.80 19.05 19.30 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top 5 10 15 5 10 15 5 10 15 5 10 15 mold draft angle bottom * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-001 drawing no. c04-005 significant characteristic
mcp6041/2/3/4 ds21669b-page 24 2002 microchip technology inc. 14-lead plastic small outline (sl) ? narrow, 150 mil (soic) foot angle 048048 15 12 0 15 12 0 mold draft angle bottom 15 12 0 15 12 0 mold draft angle top 0.51 0.42 0.36 .020 .017 .014 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 1.27 0.84 0.41 .050 .033 .016 l foot length 0.51 0.38 0.25 .020 .015 .010 h chamfer distance 8.81 8.69 8.56 .347 .342 .337 d overall length 3.99 3.90 3.81 .157 .154 .150 e1 molded package width 6.20 5.99 5.79 .244 .236 .228 e overall width 0.25 0.18 0.10 .010 .007 .004 a1 standoff 1.55 1.42 1.32 .061 .056 .052 a2 molded package thickness 1.75 1.55 1.35 .069 .061 .053 a overall height 1.27 .050 p pitch 14 14 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d p n b e e1 h l c 45 a2 a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-012 drawing no. c04-065 significant characteristic
2002 microchip technology inc. ds21669b-page 25 mcp6041/2/3/4 14-lead plastic thin shrink small outline (st) ? 4.4 mm (tssop) 8 4 0 8 4 0 foot angle 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.30 0.25 0.19 .012 .010 .007 b1 lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 0.70 0.60 0.50 .028 .024 .020 l foot length 5.10 5.00 4.90 .201 .197 .193 d molded package length 4.50 4.40 4.30 .177 .173 .169 e1 molded package width 6.50 6.38 6.25 .256 .251 .246 e overall width 0.15 0.10 0.05 .006 .004 .002 a1 standoff 0.95 0.90 0.85 .037 .035 .033 a2 molded package thickness 1.10 .043 a overall height 0.65 .026 p pitch 14 14 n number of pins max nom min max nom min dimension limits millimeters* inches units l c 2 1 d n b p e1 e a2 a1 a * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .005? (0.127mm) per side. jedec equivalent: mo-153 drawing no. c04-087 significant characteristic
mcp6041/2/3/4 ds21669b-page 26 2002 microchip technology inc. notes:
2002 microchip technology inc. ds21669b-page 27 mcp6041/2/3/4 systems information and upgrade hot line the systems information and upgrade line provides system users a listing of the latest versions of all of microchip's development systems software products. plus, this line provides information on how customers can receive any currently available upgrade kits.the hot line numbers are: 1-800-755-2345 for u.s. and most of canada, and 1-480-792-7302 for the rest of the world. on-line support microchip provides on-line support on the microchip world wide web (www) site. the web site is used by microchip as a means to make files and information easily available to customers. to view the site, the user must have access to the internet and a web browser, such as netscape or microsoft explorer. files are also available for ftp download from our ftp site. connecting to the microchip internet web site the microchip web site is available by using your favorite internet browser to attach to: www.microchip.com the file transfer site is available by using an ftp ser- vice to connect to: ftp://ftp.microchip.com the web site and file transfer site provide a variety of services. users may download files for the latest development tools, data sheets, application notes, user's guides, articles and sample programs. a vari- ety of microchip specific business information is also available, including listings of microchip sales offices, distributors and factory representatives. other data available for consideration is: ? latest microchip press releases ? technical support section with frequently asked questions ? design tips ? device errata ? job postings ? microchip consultant program member listing ? links to other useful web sites related to microchip products ? conferences for products, development systems, technical information and more ? listing of seminars and events 013001
mcp6041/2/3/4 ds21669b-page 28 2002 microchip technology inc. reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip prod- uct. if you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-4150. please list the following information, and use this outline to provide us with your comments about this data sheet. 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this data sheet easy to follow? if not, why? 4. what additions to the data sheet do you think would enhance the structure and subject? 5. what deletions from the data sheet could be made without affecting the overall usefulness? 6. is there any incorrect or misleading information (what and where)? 7. how would you improve this document? 8. how would you improve our software, systems, and silicon products? to : technical publications manager re: reader response total pages sent from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds21669b mcp6041/2/3/4
2002 microchip technology inc. ds21669b-page 29 mcp6041/2/3/4 product identification system to order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. sales and support data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recom- mended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. new customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products. part no. x /xx package temperature range device device: mcp6041: cmos single op amp MCP6041T: cmos single op amp (tape and reel for sot-23, soic, msop) mcp6042: cmos dual op amp mcp6042t: cmos dual op amp (tape and reel for soic and tssop) mcp6043: cmos single op amp w/cs function mcp6043t: cmos single op amp w/cs function (tape and reel for soic and msop) mcp6044: cmos quad op amp mcp6044t: cmos quad op amp (tape and reel for soic and tssop) temperature range: i = -40c to +85c package: ms = plastic msop, 8-lead p = plastic dip (300 mil body), 8-lead, 14-lead sn = plastic soic (150 mil body), 8-lead ot = plastic small outline transistor (sot-23), 5-lead (tape and reel - mcp6041 only) sl = plastic soic (150 mil body), 14-lead st = plastic tssop (4.4mm body), 14-lead examples: a) mcp6041-i/p: industrial temperature, pdip package. b) MCP6041T-i/ot: tape and reel, indus- trial temperature, sot-23 package. c) mcp6042-i/sn: industrial temperature, soic package. d) mcp6043-i/ms: industrial temperature, msop package. e) mcp6044-i/sl: industrial temperature, sioc package. f) mcp6044-i/st: industrial temperature, tssop package.
mcp6041/2/3/4 ds21669b-page 30 2002 microchip technology inc. notes:
2002 microchip technology inc. ds21669b - page 31 information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warranty is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. use of microchip?s products as critical com- ponents in life support systems is not authorized except with express written approval by microchip. no licenses are con- veyed, implicitly or otherwise, under any intellectual property rights. trademarks the microchip name and logo, the microchip logo, filterlab, k ee l oq , microid, mplab, pic, picmicro, picmaster, picstart, pro mate, seeval and the embedded control solutions company are registered trademarks of microchip tech- nology incorporated in the u.s.a. and other countries. dspic, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, microport, migratable memory, mpasm, mplib, mplink, mpsim, mxdev, mxlab, picc, picdem, picdem.net, rfpic, select mode and total endurance are trademarks of microchip technology incorporated in the u.s.a. serialized quick turn programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2002, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. microchip received qs-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona in july 1999 and mountain view, california in march 2002. the company?s quality system processes and procedures are qs-9000 compliant for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms, microperipherals, non-volatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001 certified.
ds21669b-page 32 2002 microchip technology inc. m americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: 480-792-7627 web address: http://www.microchip.com rocky mountain 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7966 fax: 480-792-4338 atlanta 500 sugar mill road, suite 200b atlanta, ga 30350 tel: 770-640-0034 fax: 770-640-0307 boston 2 lan drive, suite 120 westford, ma 01886 tel: 978-692-3848 fax: 978-692-3821 chicago 333 pierce road, suite 180 itasca, il 60143 tel: 630-285-0071 fax: 630-285-0075 dallas 4570 westgrove drive, suite 160 addison, tx 75001 tel: 972-818-7423 fax: 972-818-2924 detroit tri-atria office building 32255 northwestern highway, suite 190 farmington hills, mi 48334 tel: 248-538-2250 fax: 248-538-2260 kokomo 2767 s. albright road kokomo, indiana 46902 tel: 765-864-8360 fax: 765-864-8387 los angeles 18201 von karman, suite 1090 irvine, ca 92612 tel: 949-263-1888 fax: 949-263-1338 new york 150 motor parkway, suite 202 hauppauge, ny 11788 tel: 631-273-5305 fax: 631-273-5335 san jose microchip technology inc. 2107 north first street, suite 590 san jose, ca 95131 tel: 408-436-7950 fax: 408-436-7955 toronto 6285 northam drive, suite 108 mississauga, ontario l4v 1x5, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific australia microchip technology australia pty ltd suite 22, 41 rawson street epping 2121, nsw australia tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing microchip technology consulting (shanghai) co., ltd., beijing liaison office unit 915 bei hai wan tai bldg. no. 6 chaoyangmen beidajie beijing, 100027, no. china tel: 86-10-85282100 fax: 86-10-85282104 china - chengdu microchip technology consulting (shanghai) co., ltd., chengdu liaison office rm. 2401, 24th floor, ming xing financial tower no. 88 tidu street chengdu 610016, china tel: 86-28-86766200 fax: 86-28-86766599 china - fuzhou microchip technology consulting (shanghai) co., ltd., fuzhou liaison office unit 28f, world trade plaza no. 71 wusi road fuzhou 350001, china tel: 86-591-7503506 fax: 86-591-7503521 china - shanghai microchip technology consulting (shanghai) co., ltd. room 701, bldg. b far east international plaza no. 317 xian xia road shanghai, 200051 tel: 86-21-6275-5700 fax: 86-21-6275-5060 china - shenzhen microchip technology consulting (shanghai) co., ltd., shenzhen liaison office rm. 1315, 13/f, shenzhen kerry centre, renminnan lu shenzhen 518001, china tel: 86-755-2350361 fax: 86-755-2366086 china - hong kong sar microchip technology hongkong ltd. unit 901-6, tower 2, metroplaza 223 hing fong road kwai fong, n.t., hong kong tel: 852-2401-1200 fax: 852-2401-3431 india microchip technology inc. india liaison office divyasree chambers 1 floor, wing a (a3/a4) no. 11, o?shaugnessey road bangalore, 560 025, india tel: 91-80-2290061 fax: 91-80-2290062 japan microchip technology japan k.k. benex s-1 6f 3-18-20, shinyokohama kohoku-ku, yokohama-shi kanagawa, 222-0033, japan tel: 81-45-471- 6166 fax: 81-45-471-6122 korea microchip technology korea 168-1, youngbo bldg. 3 floor samsung-dong, kangnam-ku seoul, korea 135-882 tel: 82-2-554-7200 fax: 82-2-558-5934 singapore microchip technology singapore pte ltd. 200 middle road #07-02 prime centre singapore, 188980 tel: 65-6334-8870 fax: 65-6334-8850 ta iw a n microchip technology (barbados) inc., taiwan branch 11f-3, no. 207 tung hua north road taipei, 105, taiwan tel: 886-2-2717-7175 fax: 886-2-2545-0139 europe denmark microchip technology nordic aps regus business centre lautrup hoj 1-3 ballerup dk-2750 denmark tel: 45 4420 9895 fax: 45 4420 9910 france microchip technology sarl parc d?activite du moulin de massy 43 rue du saule trapu batiment a - ler etage 91300 massy, france tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany microchip technology gmbh gustav-heinemann ring 125 d-81739 munich, germany tel: 49-89-627-144 0 fax: 49-89-627-144-44 italy microchip technology srl centro direzionale colleoni palazzo taurus 1 v. le colleoni 1 20041 agrate brianza milan, italy tel: 39-039-65791-1 fax: 39-039-6899883 united kingdom microchip ltd. 505 eskdale road winnersh triangle wokingham berkshire, england rg41 5tu tel: 44 118 921 5869 fax: 44-118 921-5820 austria microchip technology austria gmbh durisolstrasse 2 a-4600 wels austria tel: 43-7242-2244-399 fax: 43-7242-2244-393 05/16/02 w orldwide s ales and s ervice

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